[coreboot-gerrit] Change in coreboot[master]: sb/intel/lynxpoint/sata.c: Don't enable Bus Master

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47031 )

Change subject: sb/intel/lynxpoint/sata.c: Don't enable Bus Master
......................................................................

sb/intel/lynxpoint/sata.c: Don't enable Bus Master

Bus Master is not required and reference code does not set it.

Change-Id: I7a84da5b712e6fa569ad9f412c440afeb6a8cc5d
Signed-off-by: Angel Pons 
---
M src/southbridge/intel/lynxpoint/sata.c
1 file changed, 2 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/47031/1

diff --git a/src/southbridge/intel/lynxpoint/sata.c b/src/southbridge/intel/lynxpoint/sata.c
index 4174e1f..d8eb2a8 100644
--- a/src/southbridge/intel/lynxpoint/sata.c
+++ b/src/southbridge/intel/lynxpoint/sata.c
@@ -51,9 +51,8 @@

/* SATA configuration */

-	/* Enable BARs */
-	pci_write_config16(dev, PCI_COMMAND,
-			   PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
+	/* Enable memory space decoding for ABAR */
+	pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_IO);

printk(BIOS_DEBUG, "SATA: Controller in AHCI mode.\n");