Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58507 )
Change subject: soc/intel/braswell: use mp_cpu_bus_init ......................................................................
soc/intel/braswell: use mp_cpu_bus_init
Implement mp_init_cpus and use mp_cpu_bus_init as init function in cpu_bus_ops.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I2adcb1e1d79ced804925c81095cc5c0c2e6f9948 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58507 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Raul Rangel rrangel@chromium.org --- M src/soc/intel/braswell/chip.c M src/soc/intel/braswell/cpu.c M src/soc/intel/braswell/include/soc/ramstage.h 3 files changed, 3 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved
diff --git a/src/soc/intel/braswell/chip.c b/src/soc/intel/braswell/chip.c index e3c7aa8..e2ee0a9 100644 --- a/src/soc/intel/braswell/chip.c +++ b/src/soc/intel/braswell/chip.c @@ -19,7 +19,7 @@ static struct device_operations cpu_bus_ops = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, - .init = soc_init_cpus + .init = mp_cpu_bus_init, };
static void enable_dev(struct device *dev) diff --git a/src/soc/intel/braswell/cpu.c b/src/soc/intel/braswell/cpu.c index ed52442..7c7a15d 100644 --- a/src/soc/intel/braswell/cpu.c +++ b/src/soc/intel/braswell/cpu.c @@ -12,6 +12,7 @@ #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/smm.h> +#include <device/device.h> #include <reg_script.h> #include <soc/iosf.h> #include <soc/msr.h> @@ -202,10 +203,8 @@ .post_mp_init = post_mp_init, };
-void soc_init_cpus(struct device *dev) +void mp_init_cpus(struct bus *cpu_bus) { - struct bus *cpu_bus = dev->link_list; - /* TODO: Handle mp_init_with_smm failure? */ mp_init_with_smm(cpu_bus, &mp_ops); } diff --git a/src/soc/intel/braswell/include/soc/ramstage.h b/src/soc/intel/braswell/include/soc/ramstage.h index 9312b92..a1a2ea5 100644 --- a/src/soc/intel/braswell/include/soc/ramstage.h +++ b/src/soc/intel/braswell/include/soc/ramstage.h @@ -83,7 +83,6 @@ * initialization, but it's after console and cbmem has been reinitialized. */ void soc_init_pre_device(struct soc_intel_braswell_config *config); -void soc_init_cpus(struct device *dev); void southcluster_enable_dev(struct device *dev); void scc_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index); int SocStepping(void);