[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Add support to initialize Memory

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39847 )

Change subject: soc/intel/tigerlake: Add support to initialize Memory
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Patch Set 19:

(4 comments)

https://review.coreboot.org/c/coreboot/+/39847/19//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/39847/19//COMMIT_MSG@7 
PS19, Line 7: Memory
DDR4 memory?

https://review.coreboot.org/c/coreboot/+/39847/19/src/soc/intel/tigerlake/me... 
File src/soc/intel/tigerlake/meminit_tgl.c:

https://review.coreboot.org/c/coreboot/+/39847/19/src/soc/intel/tigerlake/me... 
PS19, Line 331: printk(BIOS_DEBUG, "Unsupported channels");
I think this is worth a die() call instead of just a print.

https://review.coreboot.org/c/coreboot/+/39847/19/src/soc/intel/tigerlake/me... 
PS19, Line 407: 4i+b
4 * i + b?

https://review.coreboot.org/c/coreboot/+/39847/19/src/soc/intel/tigerlake/me... 
PS19, Line 409: 4i+b
4 * i + b?