Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46408 )
Change subject: soc/mediatek/mt8192: ufs: disable refer clk ......................................................................
soc/mediatek/mt8192: ufs: disable refer clk
ufs refer clk is enabled by default, which will cause the UFSHCI hold the SPM signal and lead to suspend fail. Since ufs kernel driver is not built-in, so disable refer clk in coreboot stage.
Signed-off-by: Wenbin Mei wenbin.mei@mediatek.com Signed-off-by: Chaotian Jing chaotian.jing@mediatek.com Change-Id: If11c1b756ad1a0b85f1005f56a6cb4648c687cf0 --- M src/soc/mediatek/mt8192/Makefile.inc M src/soc/mediatek/mt8192/include/soc/addressmap.h A src/soc/mediatek/mt8192/include/soc/ufs.h M src/soc/mediatek/mt8192/soc.c A src/soc/mediatek/mt8192/ufs.c 5 files changed, 33 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/46408/1
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index 4ce5e6a..7b098e8 100755 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -48,6 +48,7 @@ ramstage-y += ../common/mtcmos.c mtcmos.c ramstage-y += soc.c ramstage-y += devapc.c +ramstage-y += ufs.c ramstage-y += mcupm.c ramstage-y += ../common/timer.c ramstage-y += ../common/uart.c diff --git a/src/soc/mediatek/mt8192/include/soc/addressmap.h b/src/soc/mediatek/mt8192/include/soc/addressmap.h index 19728a3..85eac5b 100644 --- a/src/soc/mediatek/mt8192/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8192/include/soc/addressmap.h @@ -47,6 +47,7 @@ SPI7_BASE = IO_PHYS + 0x0101E000, SSUSB_IPPC_BASE = IO_PHYS + 0x01203e00, SFLASH_REG_BASE = IO_PHYS + 0x01234000, + UFSHCI_BASE = IO_PHYS + 0x01270000, EFUSEC_BASE = IO_PHYS + 0x01C10000, IOCFG_RM_BASE = IO_PHYS + 0x01C20000, IOCFG_BM_BASE = IO_PHYS + 0x01D10000, diff --git a/src/soc/mediatek/mt8192/include/soc/ufs.h b/src/soc/mediatek/mt8192/include/soc/ufs.h new file mode 100644 index 0000000..259aaf4 --- /dev/null +++ b/src/soc/mediatek/mt8192/include/soc/ufs.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_MT8192_UFS_H +#define SOC_MEDIATEK_MT8192_UFS_H + +#include <device/mmio.h> +#include <soc/addressmap.h> + +void ufs_disable_refclk(void); + +enum ufshci_offset { + REG_UFS_REFCLK_CTRL = 0x144, +}; + +#define UFS_REFCLK_CTRL (ufshci_base + (unsigned long)REG_UFS_REFCLK_CTRL) + +#endif /* SOC_MEDIATEK_MT8192_UFS_H */ diff --git a/src/soc/mediatek/mt8192/soc.c b/src/soc/mediatek/mt8192/soc.c index ba153f2..c865e6f 100644 --- a/src/soc/mediatek/mt8192/soc.c +++ b/src/soc/mediatek/mt8192/soc.c @@ -6,6 +6,7 @@ #include <symbols.h> #include <soc/devapc.h> #include <soc/mcupm.h> +#include <soc/ufs.h>
static void soc_read_resources(struct device *dev) { @@ -16,7 +17,8 @@ { mtk_mmu_disable_l2c_sram(); dapc_init(); - mcupm_init(); + mcupm_init(); + ufs_disable_refclk(); }
static struct device_operations soc_ops = { diff --git a/src/soc/mediatek/mt8192/ufs.c b/src/soc/mediatek/mt8192/ufs.c new file mode 100644 index 0000000..854ef4c --- /dev/null +++ b/src/soc/mediatek/mt8192/ufs.c @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/ufs.h> + +static unsigned long ufshci_base = (unsigned long)UFSHCI_BASE; + +void ufs_disable_refclk(void) +{ + /* disable ref clock to let UFSHCI release SPM signal */ + write32((void*)UFS_REFCLK_CTRL, 0); +}