[coreboot-gerrit] Change in coreboot[master]: soc/intel/{apl,cnl,icl,skl,tgl}: Update SA bit fields as per EDS

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38387 )

Change subject: soc/intel/{apl,cnl,icl,skl,tgl}: Update SA bit fields as per EDS
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Patch Set 8:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38387/7/src/soc/intel/common/block/... 
File src/soc/intel/common/block/systemagent/systemagent_early.c:

https://review.coreboot.org/c/coreboot/+/38387/7/src/soc/intel/common/block/... 
PS7, Line 89: 			pci_write_config32(SA_DEV_ROOT, index + 4, base >> 32);
> Should be written before the enable bit above.

valid point