Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37873 )
Change subject: soc/intel/cannonlake: Add Comet Lake H SA 4+2 Device ID ......................................................................
soc/intel/cannonlake: Add Comet Lake H SA 4+2 Device ID
This patch adds CML-H 4+2 SA DID into systemagent.c and report platform. According to doc #605546: CML-H (4+2) R1: 9B64h
BUG:none BRANCH:none TEST:build no error
Change-Id: I5bac6173a84a11abd2ce17f82854fbb14fb8558b Signed-off-by: Jamie Chen jamie.chen@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/37873 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Edward O'Callaghan quasisec@chromium.org Reviewed-by: Edward Hill ecgh@chromium.org --- M src/include/device/pci_ids.h M src/soc/intel/cannonlake/bootblock/report_platform.c M src/soc/intel/common/block/systemagent/systemagent.c 3 files changed, 3 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Edward Hill: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 8602683..6c3c298 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3403,6 +3403,7 @@ #define PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2 0x9B35 #define PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2 0x9B43 #define PCI_DEVICE_ID_INTEL_CML_H 0x9B54 +#define PCI_DEVICE_ID_INTEL_CML_H_4_2 0x9B64 #define PCI_DEVICE_ID_INTEL_CML_H_8_2 0x9B44 #define PCI_DEVICE_ID_INTEL_TGL_ID_U 0x9A14 #define PCI_DEVICE_ID_INTEL_TGL_ID_U_1 0x9A12 diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c index 523c1a8..19dce00 100644 --- a/src/soc/intel/cannonlake/bootblock/report_platform.c +++ b/src/soc/intel/cannonlake/bootblock/report_platform.c @@ -84,6 +84,7 @@ { PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2, "CometLake-S P0/P1 (8+2)" }, { PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2, "CometLake-S P0/P1 (10+2)" }, { PCI_DEVICE_ID_INTEL_CML_H, "CometLake-H (6+2)" }, + { PCI_DEVICE_ID_INTEL_CML_H_4_2, "CometLake-H (4+2)" }, { PCI_DEVICE_ID_INTEL_CML_H_8_2, "CometLake-H (8+2)" }, };
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index 2019ef6..2da3992 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -363,6 +363,7 @@ PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2, PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2, PCI_DEVICE_ID_INTEL_CML_H, + PCI_DEVICE_ID_INTEL_CML_H_4_2, PCI_DEVICE_ID_INTEL_CML_H_8_2, PCI_DEVICE_ID_INTEL_TGL_ID_U, PCI_DEVICE_ID_INTEL_TGL_ID_U_1,