[coreboot-gerrit] Change in coreboot[master]: mb/google/volteer: Enable FPMCU on volteer

[Nick Vaccaro (Code Review)]

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39358 )

Change subject: mb/google/volteer: Enable FPMCU on volteer
......................................................................

mb/google/volteer: Enable FPMCU on volteer

BUG=b:147500717
TEST=none

Change-Id: I32fa27b399127dbf8608e0556c77431d2dad652d
Signed-off-by: Nick Vaccaro 
---
M src/mainboard/google/volteer/variants/baseboard/devicetree.cb
1 file changed, 11 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/39358/1

diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
index c93887f..ab50458 100644
--- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -167,7 +167,7 @@
    #|                   | required to set up a BAR  |
    #|                   | for TPM communication     |
    #|                   | before memory is up       |
-	#| GSPI1             | Fingerprint MCU
+	#| GSPI1             | Fingerprint MCU           |
    #| I2C0              | Audio                     |
    #| I2C1              | Touchscreen               |
    #| I2C2              | WLAN, SAR0                |
@@ -340,7 +340,16 @@
    			device spi 0 on end
    		end
    	end # GSPI0				0xA0AA
-		device pci 1e.3 on  end # GSPI1				0xA0AB
+		device pci 1e.3 on
+			chip drivers/spi/acpi
+				register "name" = ""CRFP""
+				register "hid" = "ACPI_DT_NAMESPACE_HID"
+				register "uid" = "1"
+				register "compat_string" = ""google,cros-ec-spi""
+				register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW_WAKE(GPP_C20)"
+				device spi 0 on end
+			end # FPMCU
+		end # GSPI1				0xA0AB

device pci 1f.0 on  end # eSPI				0xA080 - A09F
    	device pci 1f.1 off end # P2SB				0xA0A0