[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Make TPM reserve area from 20KB to 32KB

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38512 )

Change subject: soc/intel/skylake: Make TPM reserve area from 20KB to 32KB
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soc/intel/skylake: Make TPM reserve area from 20KB to 32KB

TEST=Build and boot EVE and Soraka to OS.

Change-Id: Id02a2659ce42f705180370000df89d4f6b64afce
Signed-off-by: Subrata Banik 
---
M src/soc/intel/skylake/acpi/systemagent.asl
1 file changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/38512/1

diff --git a/src/soc/intel/skylake/acpi/systemagent.asl b/src/soc/intel/skylake/acpi/systemagent.asl
index 3902b93..96bfd65 100644
--- a/src/soc/intel/skylake/acpi/systemagent.asl
+++ b/src/soc/intel/skylake/acpi/systemagent.asl
@@ -182,11 +182,11 @@
    			0x00000000, PCH_PRESERVED_BASE_ADDRESS, 0xfe7fffff,
    			0x00000000, PCH_PRESERVED_BASE_SIZE)

-		/* TPM Area (0xfed40000-0xfed44fff) */
+		/* TPM Area (0xfed40000-0xfed47fff) */
    	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
    			Cacheable, ReadWrite,
-				0x00000000, 0xfed40000, 0xfed44fff, 0x00000000,
-				0x00005000)
+				0x00000000, 0xfed40000, 0xfed47fff, 0x00000000,
+				0x00008000)
 })

/* Find PCI resource area in MCRS */