[coreboot-gerrit] Change in ...coreboot[master]: i945,ICH7: Write on RPFN only once

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31005 )

Change subject: i945,ICH7: Write on RPFN only once
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i945,ICH7: Write on RPFN only once

RPFN is a R/WO register we write on it in i945/early_init.c and i82801gx/pcie.c
Drop the romstage write.

Change-Id: If9a131ad12530876a650b7a38daa9c9fc52aefb7
Signed-off-by: Elyes HAOUAS 
Reviewed-on: https://review.coreboot.org/c/31005
Tested-by: build bot (Jenkins) 
Reviewed-by: Arthur Heymans 
Reviewed-by: Paul Menzel 
---
M src/northbridge/intel/i945/early_init.c
1 file changed, 0 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Arthur Heymans: Looks good to me, approved

diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index 6bfa1c7..be882de 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -354,8 +354,6 @@
    RCBA32(HDD) = 0x0f000003;
    RCBA32(RP5D) = 0x05000002;

-	RCBA32(RPFN) = 0x00543210;
-
    pci_write_config16(PCI_DEV(0, 0x1c, 0), 0x42, 0x0141);
    pci_write_config16(PCI_DEV(0, 0x1c, 4), 0x42, 0x0141);
    pci_write_config16(PCI_DEV(0, 0x1c, 5), 0x42, 0x0141);