[coreboot-gerrit] Change in coreboot[master]: binaryPI: Move Hudson firmware higher in CBFS

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/31074 )

Change subject: binaryPI: Move Hudson firmware higher in CBFS
......................................................................

binaryPI: Move Hudson firmware higher in CBFS

Move it above 'AGESA' to increase the maximum
continuous free space in CBFS from 5.3 MiB to 5.8 MiB.

Also fixes build for cases where CBFS_SIZE < ROM_SIZE,
thus allowing FMAP regions.

NOTE: Due to off-by-one error in binaryPI, offset
0xFFFA0000 that amdfwtool advertises fails
for xHCI firmware loading.

Change-Id: Ic78520f4248f0943769e66a8825911c0ddcc368c
Signed-off-by: Kyösti Mälkki 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31074
Tested-by: build bot (Jenkins) 
Reviewed-by: Michał Żygowski 
---
M src/southbridge/amd/pi/hudson/Makefile.inc
1 file changed, 5 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Michał Żygowski: Looks good to me, approved

diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc
index a7fcd99..cfe800d 100644
--- a/src/southbridge/amd/pi/hudson/Makefile.inc
+++ b/src/southbridge/amd/pi/hudson/Makefile.inc
@@ -72,7 +72,11 @@
 #
 # EC ROM should be 64K aligned.

+ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
 HUDSON_FWM_POSITION=$(call int-add, $(call int-subtract, 0xffffffff $(CONFIG_ROM_SIZE)) 0x20000 1)
+else
+HUDSON_FWM_POSITION=0xfff20000
+endif

ifeq ($(CONFIG_HUDSON_PSP), y)

@@ -191,6 +195,7 @@
    	$(OPT_2SMUFIRMWARE2_FN_FILE) \
    	$(OPT_2SMUSCS_FILE) \
    	--flashsize $(CONFIG_ROM_SIZE) \
+		--location $(HUDSON_FWM_POSITION) \
    	--output	$@

ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)