[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Add function to clear PMCON status bits

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61650 )

Change subject: soc/intel/skylake: Add function to clear PMCON status bits
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soc/intel/skylake: Add function to clear PMCON status bits

This patch adds function to `clear PMCON status bits` into SoC directory
to align with other IA coreboot implementation.

BUG=b:211954778
TEST=None.

Signed-off-by: Subrata Banik 
Change-Id: Ie786e6ba2daf88accb5d70be33de0abe593f8c53
---
M src/soc/intel/skylake/include/soc/pm.h
M src/soc/intel/skylake/pmutil.c
2 files changed, 17 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/61650/1

diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h
index f0ce146..51be0eb 100644
--- a/src/soc/intel/skylake/include/soc/pm.h
+++ b/src/soc/intel/skylake/include/soc/pm.h
@@ -189,4 +189,7 @@
 /* STM Support */
 uint16_t get_pmbase(void);

+/* Clear PMCON status bits */
+void pmc_clear_pmcon_sts(void);
+
 #endif
diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c
index fe26ebf..5d84d22 100644
--- a/src/soc/intel/skylake/pmutil.c
+++ b/src/soc/intel/skylake/pmutil.c
@@ -265,3 +265,17 @@
    	reg8 |= SLEEP_AFTER_POWER_FAIL;
    pci_write_config8(dev, GEN_PMCON_B, reg8);
 }
+
+void pmc_clear_pmcon_sts(void)
+{
+	uint32_t reg_val;
+	uint8_t *addr;
+	addr = pmc_mmio_regs();
+
+	reg_val = read32(addr + GEN_PMCON_A);
+	/* Clear SUS_PWR_FLR, GBL_RST_STS, HOST_RST_STS, PWR_FLR bits
+	 * while retaining MS4V write-1-to-clear bit */
+	reg_val &= ~(MS4V);
+
+	write32((addr + GEN_PMCON_A), reg_val);
+}