Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44802 )
Change subject: soc/intel/elkhartlake: Do initial SoC commit till ramstage
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Patch Set 5: Code-Review+1
(2 comments)
https://review.coreboot.org/c/coreboot/+/44802/5/src/soc/intel/elkhartlake/e...
File src/soc/intel/elkhartlake/espi.c:
https://review.coreboot.org/c/coreboot/+/44802/5/src/soc/intel/elkhartlake/e...
PS5, Line 21: Chapter
nit: please cros check Chapter number/Doc details
https://review.coreboot.org/c/coreboot/+/44802/5/src/soc/intel/elkhartlake/f...
File src/soc/intel/elkhartlake/finalize.c:
https://review.coreboot.org/c/coreboot/+/44802/5/src/soc/intel/elkhartlake/f...
PS5, Line 23: #define CAMERA1_CLK 0x8000 /* Camera 1 Clock */
Remove Camera clocks if not supported by EHL.
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