Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38811 )
Change subject: mb/google/drallion: Set cpu_pl2_4_cfg to baseline for Drallion ......................................................................
mb/google/drallion: Set cpu_pl2_4_cfg to baseline for Drallion
Proper VR settings will be selected by CPU SKU and cpu_pl2_4_cfg.
BUG=b:148912093 BRANCH=None TEST=build coreboot and checked IA_TDC from TAT tool.
Change-Id: Ie471dee0c70e1831a822860c0a44455772a2b8be Signed-off-by: John Su john_su@compal.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38811 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: EricR Lai ericr_lai@compal.corp-partner.google.com Reviewed-by: Mathew King mathewk@chromium.org --- M src/mainboard/google/drallion/variants/drallion/devicetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified EricR Lai: Looks good to me, approved Mathew King: Looks good to me, approved
diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb index 92f3fb9..cdb6288 100644 --- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb +++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb @@ -65,6 +65,9 @@ register "PchHdaIDispCodecDisconnect" = "1" register "PchHdaAudioLinkHda" = "1"
+ # Select CPU PL2/PL4 config + register "cpu_pl2_4_cfg" = "baseline" + # VR Settings Configuration for 2/4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS |