[coreboot-gerrit] Change in coreboot[master]: mb/ocp/tiogapass: Set BIOS_REGION_SIZE for FSP-T code caching

[Johnny Lin (Code Review)]

Johnny Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39628 )

Change subject: mb/ocp/tiogapass: Set BIOS_REGION_SIZE for FSP-T code caching
......................................................................

mb/ocp/tiogapass: Set BIOS_REGION_SIZE for FSP-T code caching

Tested on OCP Tioga Pass.

Change-Id: Id6070974db1db54cb12109044a1f720ee7585a1f
Signed-off-by: Johnny Lin 
---
M src/mainboard/ocp/tiogapass/Kconfig
1 file changed, 4 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/39628/1

diff --git a/src/mainboard/ocp/tiogapass/Kconfig b/src/mainboard/ocp/tiogapass/Kconfig
index 87e2760..017d8c2 100644
--- a/src/mainboard/ocp/tiogapass/Kconfig
+++ b/src/mainboard/ocp/tiogapass/Kconfig
@@ -41,4 +41,8 @@
    string
    default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/board.fmd"

+config BIOS_REGION_SIZE
+	hex
+	default 0x1000000
+
 endif # BOARD_OCP_TIOGAPASS