Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37859 )
Change subject: mainboard/google/puff: Configure HDA registers ......................................................................
mainboard/google/puff: Configure HDA registers
Enable PCH HDA and configure dmic+ssp registers.
BRANCH=none BUG=b:146519004 TEST=./util/abuild/abuild -p none -t google/hatch -x -a
Change-Id: If9495261201ca256cdb35352338c0b3a82a50196 Signed-off-by: Edward O'Callaghan quasisec@google.com --- M src/mainboard/google/hatch/variants/puff/overridetree.cb 1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/37859/1
diff --git a/src/mainboard/google/hatch/variants/puff/overridetree.cb b/src/mainboard/google/hatch/variants/puff/overridetree.cb index d791b7f..ab1837f 100644 --- a/src/mainboard/google/hatch/variants/puff/overridetree.cb +++ b/src/mainboard/google/hatch/variants/puff/overridetree.cb @@ -63,6 +63,13 @@ # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39. register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1515"
+ # Intel HDA + register "PchHdaDspEnable" = "1" + register "PchHdaAudioLinkSsp0" = "1" + register "PchHdaAudioLinkSsp1" = "0" + register "PchHdaAudioLinkDmic0" = "0" + register "PchHdaAudioLinkDmic1" = "0" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value |