Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36221 )
Change subject: WIP: Add configurable ramstage support for minimal PCI scanning ......................................................................
Patch Set 14:
Patch Set 14:
So have we gone from wanting to not assign resources for certain devices to not assigning resources for almost all devices unless someone explicitly changes the code?
- I don't think that was our original problem. At least for USB4/thunderbolt there's a finite set of viddids we can purposefully not allocate resources for.
If we have a pattern, I would like to avoid VID/DID matching. I believe Jeremy investigated already there are some PCI class or capabilities that would allow generic USB4/thunderbolt detection.
- Then that leaves people plugging in GPU(s) with large amount of resources. That's a different problem, and I assume we can solve that by pushing those into 64-bit address space. I'm hand waving some details that we may need to add, but I think that solves that problem.
That is the approach I would want vendor to really put the effort into. But it turns out to be more work than I plan to volunteer for at least. For the review of this commit I am mostly in "damage management mode" to overlook that an unnecessary complex bandage does not land.