[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Support to initialize Memory

[EricR Lai (Code Review)]

EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39847 )

Change subject: soc/intel/tigerlake: Support to initialize Memory
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Patch Set 7:

(1 comment)

https://review.coreboot.org/c/coreboot/+/39847/5/src/soc/intel/tigerlake/mem... 
File src/soc/intel/tigerlake/meminit_tgl.c:

https://review.coreboot.org/c/coreboot/+/39847/5/src/soc/intel/tigerlake/mem... 
PS5, Line 179: meminit_ddr4x_sodimm
> From your above comment(One on where you say ch0 should always be MD )If I understand correctly,for  […]

Deltan use CH0 and CH1. No MD in this project. But just one dimm for each channel.