[coreboot-gerrit] Patch merged into coreboot/master: 1f86434 libpayload: xhci: Make XHCI stack usable on ARM

the following patch was just integrated into master:
commit 1f86434227beaf9806de86269f8b42eed817ae3a
Author: Julius Werner 
Date:   Tue Sep 3 17:15:31 2013 -0700

libpayload: xhci: Make XHCI stack usable on ARM

This patch updates the libpayload XHCI stack to run on ARM CPUs (tested
    with the DWC3 controller on an Exynos5420). Firstly, it adds support for
    64-byte Slot/Endpoint Context sizes. Since the existing context handling
    code represented the whole device context as a C struct (whose size has
    to be known at compile time), it was necessary to refactor the input and
    device context structures to consist of pointers to the actual contexts
    instead.

Secondly, it moves all data structures that the xHC accesses through DMA
    to cache-coherent memory. With a similar rationale as in the ARM patches
    for EHCI, using explicit cache maintenance functions to correctly handle
    the actual transfer buffers in all cases is presumably impossible.
    Instead this patch also chooses to create a DMA bounce buffer in the
    XHCI stack where transfer buffers which are not already cache-coherent
    will be copied to/from.

Change-Id: I14e82fffb43b4d52d687b65415f2e33920e088de
    Signed-off-by: Julius Werner 
    Reviewed-on: https://chromium-review.googlesource.com/169453
    Reviewed-by: Stefan Reinauer 
    (cherry picked from commit 1fa9964063cce6cbd87ba68334806dde8aa2354c)
    Signed-off-by: Isaac Christensen 
    Reviewed-on: http://review.coreboot.org/6643
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel 
    Reviewed-by: Stefan Reinauer

See http://review.coreboot.org/6643 for details.

-gerrit