Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/20395
Change subject: [WIP] nb/haswell: use GMA common OpRegion ......................................................................
[WIP] nb/haswell: use GMA common OpRegion
Add update_igd_opregion() to handle platform-specific mailbox data.
Change-Id: Id1d8829d8e8542a165d5eb57725f211c4ae56cf8 Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/northbridge/intel/haswell/Kconfig M src/northbridge/intel/haswell/gma.c 2 files changed, 36 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/20395/1
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig index 90f8774..d6cf0d7 100644 --- a/src/northbridge/intel/haswell/Kconfig +++ b/src/northbridge/intel/haswell/Kconfig @@ -17,7 +17,7 @@ bool select CPU_INTEL_HASWELL select NORTHBRIDGE_INTEL_COMMON_MRC_CACHE - select NORTHBRIDGE_INTEL_COMMON_GMA_OPREGION + select INTEL_GMA_OPREGION select INTEL_DDI select INTEL_GMA_ACPI select RELOCATABLE_RAMSTAGE diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 0dcd82a..ef80f77 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -23,7 +23,7 @@ #include <drivers/intel/gma/i915_reg.h> #include <drivers/intel/gma/i915.h> #include <cpu/intel/haswell/haswell.h> -#include <northbridge/intel/common/gma_opregion.h> +#include <drivers/intel/gma/opregion.h> #include <stdlib.h> #include <string.h> #include <southbridge/intel/lynxpoint/nvs.h> @@ -524,6 +524,39 @@ drivers_intel_gma_displays_ssdt_generate(gfx); }
+/* Initialize IGD OpRegion, called from ACPI code */ +static void +update_igd_opregion(igd_opregion_t *opregion) +{ + /* We just assume we're mobile for now */ + opregion->header.mailboxes = MAILBOXES_MOBILE; + + //From Intel OpRegion reference doc + opregion->header.pcon = 279; + + // Initialize Mailbox 1 + opregion->mailbox1.clid = 1; + + /* Initialize Mailbox 3 */ + opregion->mailbox3.bclp = IGD_BACKLIGHT_BRIGHTNESS; + opregion->mailbox3.pfit = IGD_FIELD_VALID | IGD_PFIT_STRETCH; + opregion->mailbox3.pcft = 0; /* should be (IMON << 1) & 0x3e */ + opregion->mailbox3.cblv = IGD_FIELD_VALID | IGD_INITIAL_BRIGHTNESS; + opregion->mailbox3.bclm[0] = IGD_WORD_FIELD_VALID + 0x0000; + opregion->mailbox3.bclm[1] = IGD_WORD_FIELD_VALID + 0x0a19; + opregion->mailbox3.bclm[2] = IGD_WORD_FIELD_VALID + 0x1433; + opregion->mailbox3.bclm[3] = IGD_WORD_FIELD_VALID + 0x1e4c; + opregion->mailbox3.bclm[4] = IGD_WORD_FIELD_VALID + 0x2866; + opregion->mailbox3.bclm[5] = IGD_WORD_FIELD_VALID + 0x327f; + opregion->mailbox3.bclm[6] = IGD_WORD_FIELD_VALID + 0x3c99; + opregion->mailbox3.bclm[7] = IGD_WORD_FIELD_VALID + 0x46b2; + opregion->mailbox3.bclm[8] = IGD_WORD_FIELD_VALID + 0x50cc; + opregion->mailbox3.bclm[9] = IGD_WORD_FIELD_VALID + 0x5ae5; + opregion->mailbox3.bclm[10] = IGD_WORD_FIELD_VALID + 0x64ff; + + intel_gma_opregion_register((uintptr_t)opregion); +} + static unsigned long gma_write_acpi_tables(struct device *const dev, unsigned long current, @@ -534,6 +567,7 @@
if (init_igd_opregion(opregion) != CB_SUCCESS) return current; + update_igd_opregion(opregion);
current += sizeof(igd_opregion_t);