Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31535 )
Change subject: soc/intel/cannonlake: Add support for setting FSP-S PcieRpHotPlug from devicetree
......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/31535/2//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/31535/2//COMMIT_MSG@7
PS2, Line 7: soc/intel/cannonlake: Add support for setting FSP-S PcieRpHotPlug from devicetree
A little shorter:
Support setting FSP-S PcieRpHotPlug from devicetree
--
To view, visit
https://review.coreboot.org/c/coreboot/+/31535
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I3aa8990a335e413628c016007ebabf7142aef80d
Gerrit-Change-Number: 31535
Gerrit-PatchSet: 2
Gerrit-Owner: Jeremy Soller
jackpot51@gmail.com
Gerrit-Reviewer: Furquan Shaikh
furquan@google.com
Gerrit-Reviewer: Jeremy Soller
jackpot51@gmail.com
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: Shelley Chen
shchen@google.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Paul Menzel
paulepanter@users.sourceforge.net
Gerrit-Comment-Date: Thu, 21 Feb 2019 16:34:38 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment