25 Feb
2020
25 Feb
'20
10:37 a.m.
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39117 )
Change subject: vendorcode/intel/fsp/fsp2_0/tgl: Update FSP header file for Tiger Lake ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39117/2/src/vendorcode/intel/fsp/fs... File src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h:
https://review.coreboot.org/c/coreboot/+/39117/2/src/vendorcode/intel/fsp/fs... PS2, Line 192: /** Offset 0x010B - Enables UART hardware flow control, CTS and RTS lines Add field name. (Now field name and help text are equal)
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ib2a08ce73526fb0eb4e7c2a674af78c2913f0a08
Gerrit-Change-Number: 39117
Gerrit-PatchSet: 2
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