Anjaneya "Reddy" Chagam has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38548 )
Change subject: soc/intel: Add Intel SkyLake Scalable Processor support ......................................................................
Patch Set 16:
(3 comments)
Thx for the review. Pl see my comments inline.
https://review.coreboot.org/c/coreboot/+/38548/15/src/soc/intel/skylake_sp/K... File src/soc/intel/skylake_sp/Kconfig:
https://review.coreboot.org/c/coreboot/+/38548/15/src/soc/intel/skylake_sp/K... PS15, Line 154: Do not change this value
This kind of message makes me very curious about things. […]
Good point. This and IQAT_ENABLE are not relevant for Xeon SP SOC - will push new file with cleaned up Kconfig.
https://review.coreboot.org/c/coreboot/+/38548/15/src/soc/intel/skylake_sp/a... File src/soc/intel/skylake_sp/acpi/uncore_irq.asl:
PS15:
Do these have some sort of pattern, or could be grouped in logical blocks somehow?
They point to devices on Xeon SP IIO Stacks - will add comments indicating the devices they refer to and push changes
https://review.coreboot.org/c/coreboot/+/38548/15/src/soc/intel/skylake_sp/a... PS15, Line 50: Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 },
Looks odd, is this correct?
This is correct. [DMI0]: Legacy PCI Express Port 0 on PC00. I will add comments indicating devices they point to and push change.