Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41368 )
Change subject: nb/intel/i440bx: add resources during read_resources() ......................................................................
nb/intel/i440bx: add resources during read_resources()
The chipset code was incorrectly adding memory resources to the domain device after resource allocation occurred. It's not possible to get the correct view of the address space, and it's generally incorrect to not add resources during read_resources(). This change fixes the order by adding resources in read_resources().
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: I84c1ba8645b548248a8bb8bf5bc4953d3be12475 --- M src/northbridge/intel/i440bx/northbridge.c 1 file changed, 3 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/41368/1
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c index aefd026..cc1f7ed 100644 --- a/src/northbridge/intel/i440bx/northbridge.c +++ b/src/northbridge/intel/i440bx/northbridge.c @@ -27,7 +27,7 @@ .device = 0x7190, };
-static void i440bx_domain_set_resources(struct device *dev) +static void i440bx_domain_read_resources(struct device *dev) { struct device *mc_dev; uint32_t pci_tolm; @@ -62,12 +62,11 @@ ram_resource(dev, idx++, 0, 640); ram_resource(dev, idx++, 768, tolmk - 768); } - assign_resources(dev->link_list); }
static struct device_operations pci_domain_ops = { - .read_resources = pci_domain_read_resources, - .set_resources = i440bx_domain_set_resources, + .read_resources = i440bx_domain_read_resources, + .set_resources = pci_domain_set_resources, .scan_bus = pci_domain_scan_bus, };