Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30481
Change subject: drivers/usb: Initialize the HW once in CAR stages ......................................................................
drivers/usb: Initialize the HW once in CAR stages
The EHCI hardware needs to be initialized only once during CAR stages. Some exception need to be made when a blob messes with the EHCI hardware. To achieve this add a fixed location in the car.ld linker script such that the ehci debug information can be shared across CAR stages.
Currently this means only romstage and bootblock, but verstage can also be hooked up later on.
Tested on google/peppy: Both the bootblock and the romstage properly output console.
Change-Id: I78e20a172fd5cc81f366d580f3cce57b9545d7a2 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/arch/x86/car.ld M src/arch/x86/include/arch/symbols.h M src/drivers/usb/ehci_debug.c M src/include/console/usb.h M src/northbridge/intel/sandybridge/raminit_mrc.c M src/soc/intel/fsp_baytrail/romstage/romstage.c M src/soc/intel/fsp_broadwell_de/romstage/romstage.c M src/southbridge/intel/fsp_rangeley/romstage.c 8 files changed, 32 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/30481/1
diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld index 8665682..893b31f 100644 --- a/src/arch/x86/car.ld +++ b/src/arch/x86/car.ld @@ -40,9 +40,9 @@ _car_stack_end = .; #endif /* The pre-ram cbmem console as well as the timestamp region are fixed - * in size. Therefore place them at the beginning .car.data section - * so that multiple stages (romstage and verstage) have a consistent - * link address of these shared objects. */ + * in size. Therefore place them above the car global section so that + * multiple stages (romstage and verstage) have a consistent + * link address of these shared objects. */ PRERAM_CBMEM_CONSOLE(., CONFIG_PRERAM_CBMEM_CONSOLE_SIZE) #if IS_ENABLED(CONFIG_PAGING_IN_CACHE_AS_RAM) . = ALIGN(32); @@ -66,6 +66,9 @@ . += 256; _car_drivers_storage_end = .; #endif + _car_ehci_dbg_info_start = .; + . += 64; + _car_ehci_dbg_info_end = .; /* _car_global_start and _car_global_end provide symbols to per-stage * variables that are not shared like the timestamp and the pre-ram * cbmem console. This is useful for clearing this area on a per-stage diff --git a/src/arch/x86/include/arch/symbols.h b/src/arch/x86/include/arch/symbols.h index 704e3bb..9ef6a3b 100644 --- a/src/arch/x86/include/arch/symbols.h +++ b/src/arch/x86/include/arch/symbols.h @@ -34,6 +34,8 @@ extern char _car_stack_end[]; #define _car_stack_size (_car_stack_end - _car_stack_start)
+extern char _car_ehci_dbg_info_start[]; + /* * The _car_relocatable_data_[start|end] symbols cover CAR data which is * relocatable once memory comes online. Variables with CAR_GLOBAL decoration diff --git a/src/drivers/usb/ehci_debug.c b/src/drivers/usb/ehci_debug.c index 23aa38c..c3713d9 100644 --- a/src/drivers/usb/ehci_debug.c +++ b/src/drivers/usb/ehci_debug.c @@ -18,6 +18,7 @@ #include <console/console.h> #include <console/usb.h> #include <arch/io.h> +#include <arch/symbols.h> #include <arch/early_variables.h> #include <string.h> #include <cbmem.h> @@ -27,6 +28,7 @@ #include "ehci.h"
struct ehci_debug_info { + bool initialized; void *ehci_base; void *ehci_debug;
@@ -61,6 +63,10 @@
static inline struct ehci_debug_info *dbgp_ehci_info(void) { + if (IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) + && (ENV_ROMSTAGE || ENV_BOOTBLOCK || ENV_VERSTAGE)) + glob_dbg_info_p = + (struct ehci_debug_info *)_car_ehci_dbg_info_start; if (car_get_var(glob_dbg_info_p) == NULL) car_set_var(glob_dbg_info_p, &glob_dbg_info);
@@ -569,6 +575,8 @@ goto err; }
+ info->initialized = true; + return 0; err: /* Things didn't work so remove my claim */ @@ -648,11 +656,14 @@
#endif
-static int usbdebug_hw_init(void) +static int usbdebug_hw_init(bool force) { struct ehci_debug_info *dbg_info = dbgp_ehci_info(); unsigned int ehci_base, dbg_offset;
+ if (dbg_info->initialized && !force) + return -1; + if (ehci_debug_hw_enable(&ehci_base, &dbg_offset)) return -1; return usbdebug_init_(ehci_base, dbg_offset, dbg_info); @@ -686,7 +697,7 @@ * are still not enabled. Should never happen. */ rv = dbgp_enabled() ? 0 : -1; if (!ENV_POSTCAR && rv < 0) - rv = usbdebug_hw_init(); + rv = usbdebug_hw_init(true);
if (rv < 0) printk(BIOS_DEBUG, "usbdebug: Failed hardware init\n"); @@ -713,7 +724,7 @@ return &dbgp_ehci_info()->ep_pipe[DBGP_CONSOLE_EPIN]; }
-void usbdebug_init(void) +void usbdebug_init(bool force) { /* USB console init is done early in romstage, yet delayed to * CBMEM_INIT_HOOKs for postcar and ramstage as we recover state @@ -721,16 +732,16 @@ */ if (IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) && (ENV_ROMSTAGE || ENV_BOOTBLOCK)) - usbdebug_hw_init(); + usbdebug_hw_init(force);
/* USB console init is done early in ramstage if it was * not done in romstage, this does not require CBMEM. */ if (!IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) && ENV_POSTCAR) - usbdebug_hw_init(); + usbdebug_hw_init(force);
if (!IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) && ENV_RAMSTAGE && !IS_ENABLED(CONFIG_POSTCAR_STAGE)) - usbdebug_hw_init(); + usbdebug_hw_init(force);
} diff --git a/src/include/console/usb.h b/src/include/console/usb.h index d4429e6..ed91cce 100644 --- a/src/include/console/usb.h +++ b/src/include/console/usb.h @@ -20,7 +20,7 @@ #include <rules.h> #include <stdint.h>
-void usbdebug_init(void); +void usbdebug_init(bool force);
void usb_tx_byte(int idx, unsigned char data); void usb_tx_flush(int idx); @@ -36,7 +36,7 @@ #define USB_PIPE_FOR_GDB 0
#if __CONSOLE_USB_ENABLE__ -static inline void __usbdebug_init(void) { usbdebug_init(); } +static inline void __usbdebug_init(void) { usbdebug_init(false); } static inline void __usb_tx_byte(u8 data) { usb_tx_byte(USB_PIPE_FOR_CONSOLE, data); @@ -52,7 +52,7 @@ #if 0 && IS_ENABLED(CONFIG_GDB_STUB) && \ ((ENV_ROMSTAGE && IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE)) \ || ENV_RAMSTAGE) -static inline void __gdb_hw_init(void) { usbdebug_init(); } +static inline void __gdb_hw_init(void) { usbdebug_init(false); } static inline void __gdb_tx_byte(u8 data) { usb_tx_byte(USB_PIPE_FOR_GDB, data); diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index 1975051..46cd201 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -238,10 +238,8 @@ die("UEFI PEI System Agent not found.\n"); }
-#if IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) /* mrc.bin reconfigures USB, so reinit it to have debug */ - usbdebug_init(); -#endif + usbdebug_init(true);
/* For reference print the System Agent version * after executing the UEFI PEI stage. diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c index bc49a41..c71b637 100644 --- a/src/soc/intel/fsp_baytrail/romstage/romstage.c +++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c @@ -225,10 +225,8 @@ printk(BIOS_DEBUG, "%s status: %x hob_list_ptr: %x\n", __func__, (u32) status, (u32) hob_list_ptr);
-#if IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) /* FSP reconfigures USB, so reinit it to have debug */ - usbdebug_init(); -#endif /* IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) */ + usbdebug_init(true);
printk(BIOS_DEBUG, "FSP Status: 0x%0x\n", (u32)status);
diff --git a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c index 801f9e0..8e837fc 100644 --- a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c +++ b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c @@ -101,10 +101,8 @@ printk(BIOS_DEBUG, "%s status: %x hob_list_ptr: %x\n", __func__, (u32) status, (u32) hob_list_ptr);
-#if IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) /* FSP reconfigures USB, so reinit it to have debug */ - usbdebug_init(); -#endif /* IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) */ + usbdebug_init(true);
printk(BIOS_DEBUG, "FSP Status: 0x%0x\n", (u32)status);
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c index f986d79..d001656 100644 --- a/src/southbridge/intel/fsp_rangeley/romstage.c +++ b/src/southbridge/intel/fsp_rangeley/romstage.c @@ -99,10 +99,8 @@ printk(BIOS_DEBUG, "%s status: %x hob_list_ptr: %x\n", __func__, (u32) status, (u32) hob_list_ptr);
-#if IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) /* FSP reconfigures USB, so reinit it to have debug */ - usbdebug_init(); -#endif /* IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) */ + usbdebug_init(true);
printk(BIOS_DEBUG, "FSP Status: 0x%0x\n", (u32)status);