Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34368 )
Change subject: amd/stoneyridge/Kconfig: Enable stage cache based on HAVE_ACPI_RESUME ......................................................................
amd/stoneyridge/Kconfig: Enable stage cache based on HAVE_ACPI_RESUME
This patch fixes inconsistent issue with stage cache enabling with HAVE_ACPI_RESUME config enable. Only enable stage cache if CONFIG_HAVE_ACPI_RESUME=y
Change-Id: I7c3b3ec4642a615e17fb3dbdedca6af8ca95ea2b Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/34368 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Martin Roth martinroth@google.com Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/soc/amd/stoneyridge/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved Marshall Dawson: Looks good to me, approved
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 3a8fd05..ea0ad5f 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -73,7 +73,7 @@ select C_ENVIRONMENT_BOOTBLOCK select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH - select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM + select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if HAVE_ACPI_RESUME select PARALLEL_MP select PARALLEL_MP_AP_WORK select HAVE_SMI_HANDLER