Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Angel Pons, Sridhar Siricilla, Aamir Bohra, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48847
to look at the new patch set (#2).
Change subject: soc/intel/alderlake: Update CPU microcode patch base address/size ......................................................................
soc/intel/alderlake: Update CPU microcode patch base address/size
This patch updates CPU microcode patch base address/size to FSP-S UPD to have second microcode patch loaded successfully to enable Mcheck flow.
This is new feature requirement for ADL as per new Mcheck initialization flow.
TEST=Able to reach beyond PC6 without any MCE.
Change-Id: I936816e3173dbcdf82b2b16b465f6b4ed5d90335 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/alderlake/fsp_params.c 1 file changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/48847/2