[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/ptl: Enable FSP debug log level control using CBFS

[Subrata Banik (Code Review)]

Attention is currently required from: Intel coreboot Reviewers, Jayvik Desai, Julius Werner, Jérémy Compostella, Kapil Porwal, Pranava Y N.

Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86002?usp=email )

Change subject: soc/intel/ptl: Enable FSP debug log level control using CBFS
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Patch Set 4:

(2 comments)

File src/soc/intel/pantherlake/Kconfig:

https://review.coreboot.org/c/coreboot/+/86002/comment/00bae885_2b8de46d?usp... :
PS4, Line 19: 	select FSP_DEBUG_LOG_LEVEL_USING_CBFS if MAINBOARD_HAS_CHROMEOS
> > Why does it depend on MAINBOARD_HAS_CHROMEOS? […]

Acknowledged

File src/soc/intel/pantherlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/86002/comment/5792005a_afec66cd?usp... :
PS4, Line 314: 	if (CONFIG(FSP_DEBUG_LOG_LEVEL_USING_CBFS) && is_enabled) {
> > It looks quite a cumbersome construction to me, what adding and using the following helper functio […]

Acknowledged