Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32398 )
Change subject: mb/google/hatch/var/kohaku: Skip UART0 config in FSP
......................................................................
Patch Set 2:
Hi Fuquan,
we also need this change.
Do you think this require another commit?
thanks.
diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
index d564918..606a3b5 100644
--- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
@@ -15,6 +15,13 @@ chip soc/intel/cannonlake
[PchSerialIoIndexUART2] = PchSerialIoDisabled,
}"
+ register "common_soc_config" = "{
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ }"
+
--
To view, visit
https://review.coreboot.org/c/coreboot/+/32398
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ia25b45811be26d55fc0019e4cd22eb7310b5a4c4
Gerrit-Change-Number: 32398
Gerrit-PatchSet: 2
Gerrit-Owner: Furquan Shaikh
furquan@google.com
Gerrit-Reviewer: Furquan Shaikh
furquan@google.com
Gerrit-Reviewer: Grace Kao
grace.kao@intel.com
Gerrit-Reviewer: Kane Chen
kane.chen@intel.com
Gerrit-Reviewer: Shelley Chen
shchen@google.com
Gerrit-Reviewer: Tim Wawrzynczak
twawrzynczak@chromium.org
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Grace Kao
grace.kao@intel.corp-partner.google.com
Gerrit-CC: Kane Chen
kane.chen@intel.corp-partner.google.com
Gerrit-CC: Philip Chen
philipchen@google.com
Gerrit-CC: shkim
sh_.kim@samsung.com
Gerrit-Comment-Date: Tue, 23 Apr 2019 10:39:43 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: No
Gerrit-MessageType: comment