[coreboot-gerrit] Change in coreboot[master]: cezanne: Update CPPC value

[Bao Zheng (Code Review)]

Attention is currently required from: Zheng Bao.
Hello Zheng Bao,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/63632

to review the following change.

Change subject: cezanne: Update CPPC value
......................................................................

cezanne: Update CPPC value

Change-Id: I091ab3bbc5f94961f8b366a3fa00f50f5c9fa182
Signed-off-by: Zheng Bao 
---
M src/soc/amd/cezanne/cppc.c
1 file changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/63632/1

diff --git a/src/soc/amd/cezanne/cppc.c b/src/soc/amd/cezanne/cppc.c
index 1afa26f..3f300ba 100644
--- a/src/soc/amd/cezanne/cppc.c
+++ b/src/soc/amd/cezanne/cppc.c
@@ -28,13 +28,13 @@
    config->entries[CPPC_COUNTER_WRAP]		= CPPC_UNSUPPORTED;
    config->entries[CPPC_REF_PERF_COUNTER]		= CPPC_REG_MSR(MSR_MAX_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64);
    config->entries[CPPC_DELIVERED_PERF_COUNTER]	= CPPC_REG_MSR(MSR_ACTUAL_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64);
-	config->entries[CPPC_PERF_LIMITED]		= CPPC_REG_MSR(MSR_CPPC_STATUS, 1, 1);
+	config->entries[CPPC_PERF_LIMITED]		= CPPC_REG_MSR(MSR_CPPC_STATUS, 0, 2);
    config->entries[CPPC_ENABLE]			= CPPC_REG_MSR(MSR_CPPC_ENABLE, 0, 1);

if (version < 2)
    	return;

-	config->entries[CPPC_AUTO_SELECT]		= CPPC_UNSUPPORTED;
+	config->entries[CPPC_AUTO_SELECT]		= CPPC_DWORD(1);
    config->entries[CPPC_AUTO_ACTIVITY_WINDOW]	= CPPC_UNSUPPORTED;
    config->entries[CPPC_PERF_PREF]			= CPPC_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_ENERGY_PERF_PREF, 8);
    config->entries[CPPC_REF_PERF]			= CPPC_UNSUPPORTED;
@@ -42,8 +42,8 @@
    if (version < 3)
    	return;

-	config->entries[CPPC_LOWEST_FREQ]		= CPPC_UNSUPPORTED;
-	config->entries[CPPC_NOMINAL_FREQ]		= CPPC_UNSUPPORTED;
+	config->entries[CPPC_LOWEST_FREQ]		= CPPC_DWORD(400);
+	config->entries[CPPC_NOMINAL_FREQ]		= CPPC_DWORD(2000);
 }