Subrata Banik has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32802 )
Change subject: Remove remaining unnecessary ENV_RAMSTAGE guard ......................................................................
Remove remaining unnecessary ENV_RAMSTAGE guard
TEST=Able to build coreboot for CML.
Change-Id: I8a6a97d59277ebfc498c83bb039436ed7c89d2cd Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/32802 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: ron minnich rminnich@gmail.com --- M src/drivers/intel/fsp2_0/include/fsp/info_header.h 1 file changed, 0 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified ron minnich: Looks good to me, approved
diff --git a/src/drivers/intel/fsp2_0/include/fsp/info_header.h b/src/drivers/intel/fsp2_0/include/fsp/info_header.h index e065924..3e86b29 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/info_header.h +++ b/src/drivers/intel/fsp2_0/include/fsp/info_header.h @@ -44,7 +44,6 @@
enum cb_err fsp_identify(struct fsp_header *hdr, const void *fsp_blob);
-#if ENV_RAMSTAGE /* * This is a FSP_INFO_HEADER that came from fsps.bin blob. It contains * both SiliconInit and Notify APIs. When SiliconInit is loaded the @@ -52,6 +51,5 @@ * header parsing again. */ extern struct fsp_header fsps_hdr; -#endif
#endif /* _FSP2_0_INFO_HEADER_H_ */