[coreboot-gerrit] Change in coreboot[master]: soc/mediatek: PCI: Assert PERST# at bootblock stage

[Jianjun Wang (Code Review)]

Attention is currently required from: Hung-Te Lin, Shelley Chen, Paul Menzel, Yu-Ping Wu.
Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62359 )

Change subject: soc/mediatek: PCI: Assert PERST# at bootblock stage
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Patch Set 9:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/62359/comment/44259c1a_d15a0f9b 
PS1, Line 28:
> The commit message now says the 100ms delay is reduced, so Paul is asking what's the reduced delay. […]

Updated, thanks.