Nico Huber has uploaded this change for review. ( https://review.coreboot.org/20820
Change subject: gma hsw+: Revise Has_DDI_D flag ......................................................................
gma hsw+: Revise Has_DDI_D flag
The GFX Programmer's Reference Manuals (PRMs) aren't clear on this but it's pretty clear from the processor datasheets which SKUs expose which pins: All U/Y processors lack DDI D.
Change-Id: I84c40b6bc01091de8a512e21354243c74643e0f5 Signed-off-by: Nico Huber nico.h@gmx.de --- M common/hw-gfx-gma-config.ads.template 1 file changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/20/20820/1
diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index 2bb916a..aba00bb 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -86,15 +86,15 @@ and CPU_Var = ULT) or CPU >= Skylake;
- Has_DDI_D : constant Boolean := (CPU in Haswell .. Broadwell - and CPU_Var = Normal) - or CPU >= Skylake; + Has_DDI_PHYs : constant Boolean := CPU = Broxton; + + Has_DDI_D : constant Boolean := CPU >= Haswell and + CPU_Var = Normal and + not Has_DDI_PHYs;
Has_Low_Voltage_Swing : constant Boolean := CPU >= Broxton;
Need_DP_Aux_Mutex : constant Boolean := False; -- Skylake & (PSR | GTC) - - Has_DDI_PHYs : constant Boolean := CPU = Broxton;
----- GMBUS: ----------- Ungate_GMBUS_Unit_Level : constant Boolean := CPU >= Skylake;