Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33447 )
Change subject: Documentation: Explain SimpleELF ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/#/c/33447/1/Documentation/lib/payloads/selfboot.... File Documentation/lib/payloads/selfboot.md:
https://review.coreboot.org/#/c/33447/1/Documentation/lib/payloads/selfboot.... PS1, Line 23: argument.
True, but looks looks like a bug to me. […]
It's not really a bug, just an architecture-dependent detail.
x86 was the first architecture and the coreboot table was found at a hardcoded address there historically. When we added Arm support, we couldn't really hardcode an address because on Arm every SoC has their own address map and you can't make architecture-wide assumptions about the physical memory layout (e.g. that 0x0 or 0xf0000 are always valid DRAM addresses). So we decided to pass the coreboot table address as a parameter to the payload and other architectures later copied it from there (mips and arm64, at least... not actually sure what riscv does).
We could pass it as an argument on x86 as well, but we'd probably still need to keep it in its hardcoded location anyway.