[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Add GPIOs layout for Lewisburg PCH

[Maxim Polyakov (Code Review)]

Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35031 )

Change subject: soc/intel/skylake: Add GPIOs layout for Lewisburg PCH
......................................................................

Patch Set 13:

(1 comment)

https://review.coreboot.org/c/coreboot/+/35031/12/src/soc/intel/skylake/Make... 
File src/soc/intel/skylake/Makefile.inc:

https://review.coreboot.org/c/coreboot/+/35031/12/src/soc/intel/skylake/Make... 
PS12, Line 87: # FIXME: it is required to add real microcode
             : cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-5e-03
             : cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-09
I haven't looked for the microcode on intel resources yet.
> I would add the microcode options in a later patch, since the CPUs would use
> the microcode.

It would be great. Thank you