Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56206 )
Change subject: soc/intel/skylake: Rename `Rmt` devicetree setting ......................................................................
soc/intel/skylake: Rename `Rmt` devicetree setting
Rename `Rmt` to `RMT` for consistency with the UPD name.
Change-Id: I905b9b65fa6c5711c6e726cc09d3cad5ba3640a1 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/56206 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Felix Singer felixsinger@posteo.net Reviewed-by: Michael Niewöhner foss@mniewoehner.de --- M src/soc/intel/skylake/chip.h M src/soc/intel/skylake/romstage/fsp_params.c 2 files changed, 2 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved Michael Niewöhner: Looks good to me, approved
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index d30547e..59f75bf 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -94,7 +94,7 @@ } SaGv;
/* Enable/disable Rank Margin Tool */ - u8 Rmt; + u8 RMT;
/* Disable Command TriState */ u8 CmdTriStateDis; diff --git a/src/soc/intel/skylake/romstage/fsp_params.c b/src/soc/intel/skylake/romstage/fsp_params.c index f05532c..21526e4 100644 --- a/src/soc/intel/skylake/romstage/fsp_params.c +++ b/src/soc/intel/skylake/romstage/fsp_params.c @@ -83,7 +83,7 @@ m_cfg->ProbelessTrace = 0; m_cfg->SaGv = config->SaGv; m_cfg->UserBd = BOARD_TYPE_ULT_ULX; - m_cfg->RMT = config->Rmt; + m_cfg->RMT = config->RMT; m_cfg->CmdTriStateDis = config->CmdTriStateDis; m_cfg->DdrFreqLimit = 0; m_cfg->VmxEnable = CONFIG(ENABLE_VMX);