Attention is currently required from: Kevin Keijzer.
Hello Kevin Keijzer,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/73450
to review the following change.
Change subject: mb/asrock/b75-pro3-m: Fix S3 resume and hardware monitoring ......................................................................
mb/asrock/b75-pro3-m: Fix S3 resume and hardware monitoring
On the ASRock B75 Pro3-M, resuming from S3 has always been broken (see cb:20227). This was because 3VSBSW# was not enabled during S3, causing the board to reboot instead of resume. This change enables 3VSBSW# during S3, which leads to S3 resume working normally.
Another issue with this board was that hardware monitoring was not working. The nct6775 Linux kernel module could not be loaded, due to the device having a base I/O port of 0. This change also enables the Super I/O properly, so that sensors-detect can find the sensor and the kernel module can be used.
Change-Id: I6e504fe4b60da1d7b9830bea5029101bb8cebcb5 Signed-off-by: Kevin Keijzer kevin@quietlife.nl --- M src/mainboard/asrock/b75pro3-m/devicetree.cb 1 file changed, 27 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/73450/1
diff --git a/src/mainboard/asrock/b75pro3-m/devicetree.cb b/src/mainboard/asrock/b75pro3-m/devicetree.cb index b9f3f4d..0042336 100644 --- a/src/mainboard/asrock/b75pro3-m/devicetree.cb +++ b/src/mainboard/asrock/b75pro3-m/devicetree.cb @@ -117,11 +117,15 @@ device pnp 2e.a on # ACPI irq 0xe0 = 0x01 irq 0xe3 = 0x14 + irq 0xe4 = 0x10 # + enable 3VSBSW# irq 0xe6 = 0x4c irq 0xe9 = 0x02 - irq 0xf0 = 0x20 + irq 0xf0 = 0x20 # + pin 70 = 3VSBSW end - device pnp 2e.b off end # HWM, front panel LED + device pnp 2e.b on # HWM, front panel LED + irq 0x30 = 0xe1 # + Fan RPM sense pins + io 0x60 = 0x0290 # + HWM base address + end device pnp 2e.d on end # VID device pnp 2e.e off end # CIR WAKE-UP device pnp 2e.f on end # GPIO Push-Pull or Open-drain