[coreboot-gerrit] Change in coreboot[master]: sc7280: Provide initial SoC support

[mturney mturney (Code Review)]

Attention is currently required from: Shelley Chen, Ravi kumar, Martin Roth, Paul Menzel, Ravi Kumar Bokka, Julius Werner.
mturney mturney has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45205 )

Change subject: sc7280: Provide initial SoC support
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Patch Set 34:

(1 comment)

File src/soc/qualcomm/sc7280/qclib.c:

https://review.coreboot.org/c/coreboot/+/45205/comment/fb982f92_011a9592 
PS22, Line 28: 	/* Attempt to load Limits Config Blob */
             : 	ssize = fmap_read_area(QCLIB_FR_LIMITS_CFG_DATA, _limits_cfg,
             : 		REGION_SIZE(limits_cfg));
             : 	if (ssize < 0)
             : 		return -1;
             : 	qclib_add_if_table_entry(QCLIB_TE_LIMITS_CFG_DATA,
             : 				 _limits_cfg, ssize, 0);
> This is not in the sc7180 soc code. […]

We are working on providing a short description of this qclib dependency in the commit message.  Note that this isn't a blob per-se as it isn't read from cbfs container, similar to pmiccfg.  It is more akin to the ddr training data that is stored once it is generated at runtime.