EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39674 )
Change subject: mb/google/deltaur: Add initial GPIO configuration ......................................................................
Patch Set 11:
(9 comments)
Check with HW for D4,E8,R6,R7. Others please change to Drallion's configuration 😊
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... File src/mainboard/google/deltaur/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 25: PLTRST
Thinking about this again. I don't think you want to disable CNVi power in S3. […]
Drallion's configuration PAD_CFG_GPI(GPP_H3, NONE, DEEP), /* CNVI_EN# */
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 37: PAD_CFG_GPO(GPP_A13, 0, PLTRST), Drallion's configuration PAD_CFG_GPO(GPP_H15, 1, DEEP), /* BT_RADIO_DIS# */
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 53: PAD_CFG_GPO(GPP_A21, 1, PLTRST), Drallion's configuration PAD_CFG_GPO(GPP_B11, 0, PLTRST), /* 3.3V_CAM_EN# */
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 102: PAD_CFG_GPO(GPP_B21, 0, PLTRST), Drallion's configuration PAD_CFG_GPO(GPP_B21, 0, DEEP), /* PCH_3.3V_TS_EN */
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 125: PAD_CFG_GPO(GPP_C8, 1, PLTRST), Drallion's configuration PAD_CFG_GPO(GPP_C10, 1, DEEP), /* WWAN_FULL_PWR_EN */
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 135: PLTRST
This will cause SSD power to be lost in S3 as well. […]
This may used for SSD D3 cold power sequence.. We can change it later on. Can't find this in Drallion.
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 192: PLTRST
Isn't ISH active in S3? Wouldn't you want these configurations to hold true in that case as well?
Yes, need change to DEEP. Drallion's configuration PAD_CFG_NF(GPP_A22, NONE, DEEP, NF1),
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 201: NONE
INVERT
Drallion's configuration PAD_CFG_GPI_APIC(GPP_C23, NONE, PLTRST, LEVEL, NONE), /* TS_INT# */ Invert not needed?
https://review.coreboot.org/c/coreboot/+/39674/11/src/mainboard/google/delta... PS11, Line 219: PAD_CFG_GPO(GPP_E10, 1, PLTRST), Drallion's configuration PAD_CFG_GPO(GPP_E16, 1, DEEP), /* HDMI_PD# */