Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35739 )
Change subject: soc/intel/common/block: Update microcode serialized for HT threads
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Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35739/5/src/soc/intel/common/block/...
File src/soc/intel/common/block/cpu/mp_init.c:
https://review.coreboot.org/c/coreboot/+/35739/5/src/soc/intel/common/block/...
PS5, Line 139: *parallel = 1;
Should I document the existing policies first and then add a new one? […]
Sounds like a good idea. Bigger question is why we are doing microcode updates above. Presumably it's because of needing to reload after SMM has been relocated? We should note why we're doing the same load twice. I know there are some cpus that wanted a 2nd reload (haswell, iirc). SGX, while note used, also needs another reload, if my memory serves.
I think we should document as well as ensure we select the right policy for each cpu because I don't think those options are necessary on all cpus.
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