Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57313 )
Change subject: mb/google/guybrush: Set eSPI alert as dedicated open drain ......................................................................
mb/google/guybrush: Set eSPI alert as dedicated open drain
Guybrush based boards must usa a dedicated eSPI alert#. Must be open drain to prevent power leaks. Keep guybrush reference board in-band since alert# may not be connected.
BUG=b:198409370 TEST=Build guybrush and nipperkin, boot guybrush BRANCH=None
Change-Id: I4b23bfc6a1167aebfde5acd524fda043b63163dc Signed-off-by: Rob Barnes robbarnes@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/57313 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Karthik Ramasubramanian kramasub@google.com --- M src/mainboard/google/guybrush/variants/baseboard/devicetree.cb M src/mainboard/google/guybrush/variants/guybrush/overridetree.cb 2 files changed, 4 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved
diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb index df8bd2a..a0d5114 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb @@ -36,7 +36,7 @@ .io_mode = ESPI_IO_MODE_QUAD, .op_freq_mhz = ESPI_OP_FREQ_33_MHZ, .crc_check_enable = 1, - .alert_pin = ESPI_ALERT_PIN_IN_BAND, + .alert_pin = ESPI_ALERT_PIN_OPEN_DRAIN, .periph_ch_en = 1, .vw_ch_en = 1, .oob_ch_en = 0, diff --git a/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb b/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb index 88c7d42..e732917 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb @@ -168,4 +168,7 @@ end end
+ # TODO(b/198596430): Disable in-band alerts after majority boards are reworked + register "common_config.espi_config.alert_pin" = "ESPI_ALERT_PIN_IN_BAND" + end # chip soc/amd/cezanne