Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44155 )
Change subject: sb/intel/lynxpoint: Consider root ports being disabled by strap ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44155/2/src/southbridge/intel/lynxp... File src/southbridge/intel/lynxpoint/pcie.c:
https://review.coreboot.org/c/coreboot/+/44155/2/src/southbridge/intel/lynxp... PS2, Line 108: * +-----+----+----+----+----+ : * | RPC | #5 | #6 | #7 | #8 | : * +-----+----+----+----+----+ : * | 0 | x1 | x1 | x1 | x1 | : * | 1 | x2 | | x1 | x1 | : * | 2 | x2 | | x2 | | : * | 3 | x4 | | | | : * +-----+----+----+----+----+
Are you by chance referring to this part of the datasheet? https://imgur.com/QrElUnO.png […]
After some deliberation on IRC, it was decided that I should explain this is what existing code assumes and that said assumptions have been propagated.