Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30383 )
Change subject: soc/intel/broadwell: Use C_ENVIRONMENT_BOOTBLOCK ......................................................................
Patch Set 39:
(3 comments)
https://review.coreboot.org/#/c/30383/37/src/soc/intel/broadwell/Kconfig File src/soc/intel/broadwell/Kconfig:
https://review.coreboot.org/#/c/30383/37/src/soc/intel/broadwell/Kconfig@117 PS37, Line 117: default 0x2000
No idea actually if the mrc.bin uses our stack. It has a separate heap in DCACHE_RAM_MRC_VAR_SIZE. […]
Well, I don't really think that we could get into trouble here. And compiling romcc purism/librem_bdw gives me a romstage stack of `0xec0` bytes. So 0x2000 seems more than enough.
https://review.coreboot.org/#/c/30383/37/src/soc/intel/broadwell/bootblock/c... File src/soc/intel/broadwell/bootblock/cpu.c:
https://review.coreboot.org/#/c/30383/37/src/soc/intel/broadwell/bootblock/c... PS37, Line 51:
The only reason this was done, was to speed up finding the microcode updates. cache_as_ram. […]
Ack
https://review.coreboot.org/#/c/30383/37/src/soc/intel/broadwell/romstage/ro... File src/soc/intel/broadwell/romstage/romstage.c:
https://review.coreboot.org/#/c/30383/37/src/soc/intel/broadwell/romstage/ro... PS37, Line 68: struct romstage_params rp = { : .bist = 0, /* checking done in the bootblock */ : .pei_data = NULL, : };
At the moment we try to have the same romstage interface with or without romcc bootblock (which pass […]
Ack