4 Jun
2021
4 Jun
'21
2:12 p.m.
Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Subrata Banik, Meera Ravindranath, Deepti Deshatty. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50996 )
Change subject: mb/adlrvp: Fix DDR5 Boot issue ......................................................................
Patch Set 7:
(1 comment)
File src/mainboard/intel/adlrvp/romstage_fsp_params.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120772): https://review.coreboot.org/c/coreboot/+/50996/comment/c7e8e9f0_63088e9a PS7, Line 29: static const int spd_array[] = { 0xA0, 0xA2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xA4, 0xA6, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }; line over 96 characters
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9998bfcd12b81c11fcc9f791da2a27d3c788e48a
Gerrit-Change-Number: 50996
Gerrit-PatchSet: 7
Gerrit-Owner: Meera Ravindranath meera.ravindranath@intel.com
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