Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47703 )
Change subject: include/device/pci_ids: add PCI IDs for new AMD SoCs ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/47703/3/src/include/device/pci_ids.... File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/47703/3/src/include/device/pci_ids.... PS3, Line 459: PCIE_GPP_1 Since there are multiples of these and it doesn't mean port 1, port 2, etc., maybe using PCI_GPP_D1 and _D2 would make it more clear. I'm OK either way. The clarity will need to be in the soc directory.
https://review.coreboot.org/c/coreboot/+/47703/3/src/include/device/pci_ids.... PS3, Line 492: 0x1617 0x1671?