[coreboot-gerrit] New patch to review for coreboot: soc/intel/apollolake: Flush L1D to L2 only if loaded segment is in CAR

[Furquan Shaikh]

Furquan Shaikh ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14449

-gerrit

commit 971a6ab9dc7d5ac6ad18df476e97e6f209f662e8
Author: Furquan Shaikh 
Date:   Thu Apr 21 08:10:02 2016 -0700

soc/intel/apollolake: Flush L1D to L2 only if loaded segment is in CAR

In program_segment_loaded, flush L1D to L2 only if the address of the
    loaded segment lies in the CAR region. Add an assert to ensure that
    the loaded segment does not cross CAR boundaries.

Change-Id: Ie43e99299ed82f01518c8a1c1fd2bc64747d0c7b
    Signed-off-by: Furquan Shaikh 
---
 src/soc/intel/apollolake/car.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/src/soc/intel/apollolake/car.c b/src/soc/intel/apollolake/car.c
index ff4603c..6b1bafe 100644
--- a/src/soc/intel/apollolake/car.c
+++ b/src/soc/intel/apollolake/car.c
@@ -16,6 +16,7 @@
  */

#include <arch/cpu.h>
+#include <assert.h>
 #include <program_loading.h>
 #include <soc/cpu.h>

@@ -31,9 +32,23 @@ static void flush_l1d_to_l2(void)
    wrmsr(MSR_POWER_MISC, msr);
 }

+static inline char is_car_addr(uintptr_t addr)
+{
+	return ((addr >= CONFIG_DCACHE_RAM_BASE) &&
+		(addr < (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)));
+}
+
 void platform_segment_loaded(uintptr_t start, size_t size, int flags)
 {
-	/* TODO: filter on address to see if L1D flushing required. */
+	char start_car_check = is_car_addr(start);
+	char end_car_check = is_car_addr(start + size);
+
+	/* Bail out if loaded program segment does not lie in CAR region. */
+	if (!start_car_check && !end_car_check)
+		return;
+
+	/* Loaded program segment should lie entirely within CAR region. */
+	assert (start_car_check && end_car_check);

/* Flush L1D cache to L2 on final segment loaded */
    if (flags & SEG_FINAL)