Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79083?usp=email )
(
5 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: nb/amd/pi/00730F01: introduce and use chipset devicetree ......................................................................
nb/amd/pi/00730F01: introduce and use chipset devicetree
BKDG #52740 Rev 3.05 was used as a reference for the SoC's various PCI devices. The HDA controller in the FCH at function 2 of device 0x14 on bus 0 was missing in the mainboard's devicetrees.
TEST=PC Engines APU2 still boots and doesn't show any new problems
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I6970c2f6e6d661d40406586f4e6eeb05bcd07979 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79083 Reviewed-by: Nico Huber nico.h@gmx.de Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb M src/northbridge/amd/pi/00730F01/Kconfig A src/northbridge/amd/pi/00730F01/chipset.cb 6 files changed, 118 insertions(+), 148 deletions(-)
Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved Nico Huber: Looks good to me, but someone else must approve
diff --git a/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb index 1abcd61..4a09ce7 100644 --- a/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb +++ b/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb @@ -1,32 +1,22 @@ # SPDX-License-Identifier: GPL-2.0-only
chip northbridge/amd/pi/00730F01/root_complex - device cpu_cluster 0 on end - device domain 0 on subsystemid 0x1022 0x1410 inherit - chip northbridge/amd/pi/00730F01 - device pci 0.0 on end # Root Complex - device pci 0.2 on end # IOMMU - device pci 1.0 off end # Internal Graphics P2P bridge 0x9804 - device pci 1.1 off end # Internal Multimedia - device pci 2.0 on end # PCIe Host Bridge - device pci 2.1 on end # mPCIe slot 2 (on GFX lane) - device pci 2.2 on end # LAN3 - device pci 2.3 on end # LAN2 - device pci 2.4 on end # LAN1 - device pci 2.5 on end # mPCIe slot 1 - device pci 8.0 on end # Platform Security Processor - end #chip northbridge/amd/pi/00730F01 + device ref iommu on end + device ref gpp_bridge_0 on end # mPCIe slot 2 (on GFX lane) + device ref gpp_bridge_1 on end # LAN3 + device ref gpp_bridge_2 on end # LAN2 + device ref gpp_bridge_3 on end # LAN1 + device ref gpp_bridge_4 on end # mPCIe slot 1 + end
chip southbridge/amd/pi/hudson - device pci 10.0 on end # XHCI HC0 muxed with EHCI 2 - device pci 11.0 on end # SATA - device pci 12.0 off end # USB EHCI0 usb[0:3] not connected - device pci 13.0 on end # USB EHCI1 usb[4:7] - device pci 14.0 on end # SM - device pci 14.3 on # LPC 0x439d + device ref xhci on end # XHCI HC0 muxed with EHCI 2 + device ref sata on end + device ref ehci_1 on end # USB EHCI1 usb[4:7] + device ref lpc_bridge on chip superio/nuvoton/nct5104d # SIO NCT5104D register "irq_trigger_type" = "0" register "reset_gpios" = "1" @@ -62,18 +52,9 @@ chip drivers/pc80/tpm device pnp 0c31.0 on end end # LPC TPM - end # LPC 0x439d - - device pci 14.7 on end # SD - device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI - end #chip southbridge/amd/pi/hudson - - device pci 18.0 on end - device pci 18.1 on end - device pci 18.2 on end - device pci 18.3 on end - device pci 18.4 on end - device pci 18.5 on end - - end #domain -end #northbridge/amd/pi/00730F01/root_complex + end + device ref sdhci on end + device ref ehci_2 on end # USB EHCI2 usb[8:7] - muxed with XHCI + end + end +end diff --git a/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb index 99353f4..dcff5ab 100644 --- a/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb +++ b/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb @@ -1,32 +1,23 @@ # SPDX-License-Identifier: GPL-2.0-only
chip northbridge/amd/pi/00730F01/root_complex - device cpu_cluster 0 on end - device domain 0 on subsystemid 0x1022 0x1410 inherit - chip northbridge/amd/pi/00730F01 - device pci 0.0 on end # Root Complex - device pci 0.2 on end # IOMMU - device pci 1.0 off end # Internal Graphics P2P bridge 0x9804 - device pci 1.1 off end # Internal Multimedia - device pci 2.0 on end # PCIe Host Bridge - device pci 2.1 on end # mPCIe slot 2 (on GFX lane) - device pci 2.2 on end # LAN3 - device pci 2.3 on end # LAN2 - device pci 2.4 on end # LAN1 - device pci 2.5 on end # mPCIe slot 1 - device pci 8.0 on end # Platform Security Processor - end #chip northbridge/amd/pi/00730F01 + device ref iommu on end + device ref gpp_bridge_0 on end # mPCIe slot 2 (on GFX lane) + device ref gpp_bridge_1 on end # LAN3 + device ref gpp_bridge_2 on end # LAN2 + device ref gpp_bridge_3 on end # LAN1 + device ref gpp_bridge_4 on end # mPCIe slot 1 + end
- chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus - device pci 10.0 on end # XHCI HC0 muxed with EHCI 2 - device pci 11.0 on end # SATA - device pci 12.0 on end # USB EHCI0 usb[0:3] is connected - device pci 13.0 on end # USB EHCI1 usb[4:7] - device pci 14.0 on end # SM - device pci 14.3 on # LPC 0x439d + chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus + device ref xhci on end # XHCI HC0 muxed with EHCI 2 + device ref sata on end + device ref ehci_0 on end # USB EHCI0 usb[0:3] is connected + device ref ehci_1 on end # USB EHCI1 usb[4:7] + device ref lpc_bridge on chip superio/nuvoton/nct5104d # SIO NCT5104D register "irq_trigger_type" = "0" register "reset_gpios" = "1" @@ -58,19 +49,10 @@ device pnp 2e.107 on end device pnp 2e.607 off end device pnp 2e.f on end - end # SIO NCT5104D - end # LPC 0x439d - - device pci 14.7 on end # SD - device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI - end #chip southbridge/amd/pi/hudson - - device pci 18.0 on end - device pci 18.1 on end - device pci 18.2 on end - device pci 18.3 on end - device pci 18.4 on end - device pci 18.5 on end - - end #domain -end #northbridge/amd/pi/00730F01/root_complex + end + end + device ref sdhci on end + device ref ehci_2 on end # USB EHCI2 usb[8:7] - muxed with XHCI + end + end +end diff --git a/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb index c4975cc..02390d2 100644 --- a/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb +++ b/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb @@ -1,32 +1,23 @@ # SPDX-License-Identifier: GPL-2.0-only
chip northbridge/amd/pi/00730F01/root_complex - device cpu_cluster 0 on end - device domain 0 on subsystemid 0x1022 0x1410 inherit - chip northbridge/amd/pi/00730F01 - device pci 0.0 on end # Root Complex - device pci 0.2 on end # IOMMU - device pci 1.0 off end # Internal Graphics P2P bridge 0x9804 - device pci 1.1 off end # Internal Multimedia - device pci 2.0 on end # PCIe Host Bridge - device pci 2.1 on end # LAN1 - device pci 2.2 on end # LAN2 - device pci 2.3 on end # LAN3 - device pci 2.4 on end # LAN4 - device pci 2.5 on end # mPCIe slot 1 - device pci 8.0 on end # Platform Security Processor - end #chip northbridge/amd/pi/00730F01 + device ref iommu on end + device ref gpp_bridge_0 on end # LAN1 + device ref gpp_bridge_1 on end # LAN2 + device ref gpp_bridge_2 on end # LAN3 + device ref gpp_bridge_3 on end # LAN4 + device ref gpp_bridge_4 on end # mPCIe slot 1 + end
chip southbridge/amd/pi/hudson - device pci 10.0 on end # XHCI HC0 muxed with EHCI 2 - device pci 11.0 on end # SATA - device pci 12.0 on end # USB EHCI0 usb[0:3] is connected - device pci 13.0 on end # USB EHCI1 usb[4:7] - device pci 14.0 on end # SM - device pci 14.3 on # LPC 0x439d + device ref xhci on end # XHCI HC0 muxed with EHCI 2 + device ref sata on end + device ref ehci_0 on end # USB EHCI0 usb[0:3] is connected + device ref ehci_1 on end # USB EHCI1 usb[4:7] + device ref lpc_bridge on chip superio/nuvoton/nct5104d # SIO NCT5104D register "irq_trigger_type" = "0" register "reset_gpios" = "1" @@ -59,18 +50,9 @@ device pnp 2e.607 off end device pnp 2e.f on end end # SIO NCT5104D - end # LPC 0x439d - - device pci 14.7 on end # SD - device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI - end #chip southbridge/amd/pi/hudson - - device pci 18.0 on end - device pci 18.1 on end - device pci 18.2 on end - device pci 18.3 on end - device pci 18.4 on end - device pci 18.5 on end - - end #domain -end #northbridge/amd/pi/00730F01/root_complex + end + device ref sdhci on end + device ref ehci_2 on end # USB EHCI2 usb[8:7] - muxed with XHCI + end + end +end diff --git a/src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb index 0aee11c..fb41fef 100644 --- a/src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb +++ b/src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb @@ -1,32 +1,23 @@ # SPDX-License-Identifier: GPL-2.0-only
chip northbridge/amd/pi/00730F01/root_complex - device cpu_cluster 0 on end - device domain 0 on subsystemid 0x1022 0x1410 inherit + chip northbridge/amd/pi/00730F01 + device ref iommu on end + device ref gpp_bridge_0 on end # mPCIe slot 2 (on GFX lane) + device ref gpp_bridge_1 on end # LAN3 + device ref gpp_bridge_2 on end # LAN2 + device ref gpp_bridge_3 on end # LAN1 + device ref gpp_bridge_4 on end # mPCIe slot 1 + end
- chip northbridge/amd/pi/00730F01 # PCI side of HT root complex - device pci 0.0 on end # Root Complex - device pci 0.2 on end # IOMMU - device pci 1.0 off end # Internal Graphics P2P bridge 0x9804 - device pci 1.1 off end # Internal Multimedia - device pci 2.0 on end # PCIe Host Bridge - device pci 2.1 on end # mPCIe slot 2 (on GFX lane) - device pci 2.2 on end # LAN3 - device pci 2.3 on end # LAN2 - device pci 2.4 on end # LAN1 - device pci 2.5 on end # mPCIe slot 1 - device pci 8.0 on end # Platform Security Processor - end #chip northbridge/amd/pi/00730F01 - - chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus - device pci 10.0 on end # XHCI HC0 muxed with EHCI 2 - device pci 11.0 on end # SATA - device pci 12.0 on end # USB EHCI0 usb[0:3] is connected - device pci 13.0 on end # USB EHCI1 usb[4:7] - device pci 14.0 on end # SM - device pci 14.3 on # LPC 0x439d + chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus + device ref xhci on end # XHCI HC0 muxed with EHCI 2 + device ref sata on end + device ref ehci_0 on end # USB EHCI0 usb[0:3] is connected + device ref ehci_1 on end # USB EHCI1 usb[4:7] + device ref lpc_bridge on chip superio/nuvoton/nct5104d # SIO NCT5104D register "irq_trigger_type" = "0" device pnp 2e.0 off end @@ -58,18 +49,8 @@ chip drivers/pc80/tpm device pnp 0c31.0 on end end # LPC TPM - end # LPC 0x439d - - device pci 14.7 off end # SD - device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI - end #chip southbridge/amd/pi/hudson - - device pci 18.0 on end - device pci 18.1 on end - device pci 18.2 on end - device pci 18.3 on end - device pci 18.4 on end - device pci 18.5 on end - - end #domain -end #northbridge/amd/pi/00730F01/root_complex + end + device ref ehci_2 on end # USB EHCI2 usb[8:7] - muxed with XHCI + end + end +end diff --git a/src/northbridge/amd/pi/00730F01/Kconfig b/src/northbridge/amd/pi/00730F01/Kconfig index 651735a..493bc6a 100644 --- a/src/northbridge/amd/pi/00730F01/Kconfig +++ b/src/northbridge/amd/pi/00730F01/Kconfig @@ -6,6 +6,10 @@
if NORTHBRIDGE_AMD_PI_00730F01
+config CHIPSET_DEVICETREE + string + default "northbridge/amd/pi/00730F01/chipset.cb" + config HW_MEM_HOLE_SIZEK hex default 0x100000 diff --git a/src/northbridge/amd/pi/00730F01/chipset.cb b/src/northbridge/amd/pi/00730F01/chipset.cb new file mode 100644 index 0000000..2ddfceb --- /dev/null +++ b/src/northbridge/amd/pi/00730F01/chipset.cb @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: GPL-2.0-only + +chip northbridge/amd/pi/00730F01/root_complex + device cpu_cluster 0 on end + + device domain 0 on + chip northbridge/amd/pi/00730F01 + device pci 0.0 alias gnb on end + device pci 0.2 alias iommu off end + device pci 1.0 alias gfx off end + device pci 1.1 alias gfx_hda off end + device pci 2.0 on end # Dummy Host Bridge, do not disable + device pci 2.1 alias gpp_bridge_0 off end + device pci 2.2 alias gpp_bridge_1 off end + device pci 2.3 alias gpp_bridge_2 off end + device pci 2.4 alias gpp_bridge_3 off end + device pci 2.5 alias gpp_bridge_4 off end + device pci 8.0 alias psp on end + end + + chip southbridge/amd/pi/hudson + device pci 10.0 alias xhci off end + device pci 11.0 alias sata off end + device pci 12.0 alias ehci_0 off end + device pci 13.0 alias ehci_1 off end + device pci 14.0 alias smbus on end + device pci 14.2 alias hda off end + device pci 14.3 alias lpc_bridge on end + device pci 14.7 alias sdhci off end + device pci 16.0 alias ehci_2 off end + end + + device pci 18.0 alias ht_0 on end + device pci 18.1 alias ht_1 on end + device pci 18.2 alias ht_2 on end + device pci 18.3 alias ht_3 on end + device pci 18.4 alias ht_4 on end + device pci 18.5 alias ht_5 on end + end +end