Attention is currently required from: Hung-Te Lin, Arthur Heymans, Shelley Chen, Nico Huber, Furquan Shaikh, Paul Menzel, Angel Pons, Jianjun Wang. Hello Shelley Chen, Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56791
to look at the new patch set (#13).
Change subject: soc/mediatek: Add PCIe support ......................................................................
soc/mediatek: Add PCIe support
Add PCIe support for MediaTek platform.
Reference: - MT8195 Register Map V0.3-2, Chapter 3.18 PCIe controller (Page 1250) - linux/drivers/pci/controller/pcie-mediatek-gen3.c
This code is based on MT8195 platform, but it should be common in each platform with the same PCIe IP in the future.
TEST=Build pass and boot up to kernel successfully via SSD on Cherry board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x1987 PCI SSVID : 0x1987 SN : 28F40713077B0012602 MN : Phison ESE1A043-X28 RAB : 0x1 AERL : 0x3 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model Phison ESE1A043-X28
BUG=b:178565024
Signed-off-by: Jianjun Wang jianjun.wang@mediatek.com Change-Id: Ib9b6adaafa20aeee136372ec9564273f86776da0 --- M src/soc/mediatek/common/Kconfig A src/soc/mediatek/common/include/soc/pcie_common.h A src/soc/mediatek/common/pcie.c 3 files changed, 279 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/56791/13