Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14408
-gerrit
commit 813071138556619db32fd8d42c4c35cda4649f3a Author: Stefan Reinauer stefan.reinauer@coreboot.org Date: Mon Apr 18 18:03:45 2016 -0700
WIP: southbridge/intel/bd82x6x: Changes needed for kontron/come-bip2
This needs further investigation, but without this patch, the Kontron COMe bIP2 dies at random places later on in the code.
Change-Id: Ic33fa980d383e02e3851c50d8e53e81576f9f45d Signed-off-by: Stefan Reinauer stefan.reinauer@coreboot.org --- src/southbridge/intel/bd82x6x/lpc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 1106912..b57a16d 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -367,7 +367,9 @@ static void ppt_pm_init(struct device *dev) RCBA32_AND_OR(0x33d4, 0xf000f000, 0x00670060); RCBA32(0x3a28) = 0x01010000; RCBA32(0x3a2c) = 0x01010404; +#if 0 // FIXME This breaks Kontron's COMe board RCBA32(0x3a80) = 0x01040000; +#endif RCBA32_AND_OR(0x3a84, ~0x0000ffff, 0x00001001); RCBA32_AND_OR(0x3a84, ~0UL, (1 << 24)); /* SATA 2/3 disabled */ RCBA32_AND_OR(0x3a88, ~0UL, (1 << 0)); /* SATA 4/5 disabled */ @@ -411,7 +413,6 @@ static void enable_clock_gating(device_t dev) pch_iobp_update(0xEB004000, ~0UL, (1 << 7)); pch_iobp_update(0xEC007F07, ~0UL, (1 << 31)); pch_iobp_update(0xEC004000, ~0UL, (1 << 7)); - reg32 = RCBA32(CG); reg32 |= (1 << 31); reg32 |= (1 << 29) | (1 << 28); @@ -423,7 +424,9 @@ static void enable_clock_gating(device_t dev) reg32 |= (1 << 23); reg32 &= ~(1 << 20); reg32 |= (1 << 19); +#if 0 // breaks Kontron COMe board reg32 |= (1 << 0); +#endif reg32 |= (0xf << 1); RCBA32(CG) = reg32;