Attention is currently required from: Shelley Chen, Felix Singer, Nico Huber, Furquan Shaikh, Martin Roth, Paul Menzel, Julius Werner, Angel Pons, Kyösti Mälkki.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57861 )
Change subject: Documentation/RFC: Generalize PCI support in coreboot
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Patch Set 6:
(2 comments)
File Documentation/RFC/pci_config_access.md:
https://review.coreboot.org/c/coreboot/+/57861/comment/2bb97b3b_0cf0e083
PS5, Line 25: or enhanced configuration access mechanism,
nit: already spelled out above on line 9
https://review.coreboot.org/c/coreboot/+/57861/comment/2374d02e_d73893e7
PS5, Line 32: In ChromeOS, on the other hand,
I think this is specific to the ARM SoCs, not really ChromeOS. AFAIUC, the firmware controls which PCI bus/slot/func are visible from config space.
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