Martin Roth (gaumless@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8096
-gerrit
commit 67f9386741651b504c76ba3666433cc863368355 Author: Martin Roth martin.roth@se-eng.com Date: Sun Jan 4 17:44:35 2015 -0700
fsp_baytrail: Do the CAR CBMRM transition
- Add FSP driver routine to find and return a pointer to the saved CAR data. - Add the TEMPORARY_MEMORY_HOB_GUID, used to find the saved CAR data. - Move the cbmem_recovery call from romstage.c into chipset_fsp_util.c so that it's completed by the time we get back to romstage. - Clear area in the stack in early romstage for CBMEM - Remove printk from chipset_prev_sleep_state - this gets called multiple times, including at a point when CBMEM could have been initialized as a console device, but before it's been reinitialized after the CAR->memory transition.
Change-Id: Ie3b6797cbcc9bbc6b7c9185a5fc9a85096c40ff6 Signed-off-by: Martin Roth martin.roth@se-eng.com --- src/drivers/intel/fsp/fsp_util.c | 25 +++++++++++++++++++++++ src/drivers/intel/fsp/fsp_util.h | 7 +++++++ src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c | 20 +++++++++++++++--- src/soc/intel/fsp_baytrail/romstage/romstage.c | 7 ++----- 4 files changed, 51 insertions(+), 8 deletions(-)
diff --git a/src/drivers/intel/fsp/fsp_util.c b/src/drivers/intel/fsp/fsp_util.c index d0ed9cf..8f9b7aa 100644 --- a/src/drivers/intel/fsp/fsp_util.c +++ b/src/drivers/intel/fsp/fsp_util.c @@ -177,6 +177,31 @@ volatile u8 * find_fsp () return (fsp_ptr); }
+/** finds the saved temporary memory information in the FSP HOB list + * + * @param[in] hob_list_ptr pointer to the start of the hob list + * @param[out] location ptr to ptr gets filled in with stack location + * @param[in] length ptr gets filled in with stack length + * @return 1 if stack was found, 0 if stack was not found + */ +uint8_t find_saved_temp_mem(void *hob_list_ptr, void **location, + uint32_t *length) +{ + EFI_GUID temp_hob_guid = FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID; + + EFI_HOB_GUID_TYPE *saved_mem_hob; + saved_mem_hob = (EFI_HOB_GUID_TYPE *) find_hob_by_guid(hob_list_ptr, + &temp_hob_guid); + + if (saved_mem_hob == NULL) + return 0; + + *length = saved_mem_hob->Header.HobLength; + *location =(void *) ((char *) saved_mem_hob + + sizeof(EFI_HOB_GUID_TYPE)); + return 1; +} + #ifndef __PRE_RAM__ /* Only parse HOB data in ramstage */
void print_fsp_info(void) { diff --git a/src/drivers/intel/fsp/fsp_util.h b/src/drivers/intel/fsp/fsp_util.h index 3c72f24..ff6daca 100644 --- a/src/drivers/intel/fsp/fsp_util.h +++ b/src/drivers/intel/fsp/fsp_util.h @@ -37,6 +37,7 @@ void print_fsp_info(void); void chipset_fsp_early_init(FSP_INIT_PARAMS *FspInitParams, FSP_INFO_HEADER *fsp_ptr); void ChipsetFspReturnPoint(EFI_STATUS Status, VOID *HobListPtr); +uint8_t find_saved_temp_mem(void *hob_list_ptr, void **location, uint32_t *length);
/* functions in hob.c */ void print_hob_mem_attributes(void *Hobptr); @@ -124,4 +125,10 @@ extern void *FspHobListPtr; UpdData->member?"Enabled":"Disabled"); \ break;
+ +#ifndef FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID +#define FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID \ + { 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } }; +#endif + #endif /* FSP_UTIL_H */ diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c index c6b5f9c..b645682 100644 --- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c +++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c @@ -34,6 +34,7 @@ #include <baytrail/acpi.h> #include <baytrail/iomap.h> #include <baytrail/smm.h> +#include <arch/early_variables.h>
#ifdef __PRE_RAM__ #include <baytrail/romstage.h> @@ -326,12 +327,25 @@ void chipset_fsp_early_init(FSP_INIT_PARAMS *pFspInitParams, }
/* The FSP returns here after the fsp_early_init call */ -void ChipsetFspReturnPoint(EFI_STATUS Status, - VOID *HobListPtr) +void ChipsetFspReturnPoint(EFI_STATUS Status, VOID *HobListPtr) { - if (Status == 0xFFFFFFFF) { + void *saved_tmp_mem_location; + uint32_t saved_tmp_mem_length; + + if (Status == 0xFFFFFFFF) warm_reset(); + + /* find the saved temp memory so we can recover cbmem */ + find_saved_temp_mem(HobListPtr, &saved_tmp_mem_location, + &saved_tmp_mem_length); + cbmem_recovery(chipset_prev_sleep_state(0) == 3); + + if (saved_tmp_mem_location != NULL) { + do_car_migrate_variables(saved_tmp_mem_location); + } else { + printk(BIOS_DEBUG, "Skipping CBMEM variable migration.\n"); } + romstage_main_continue(Status, HobListPtr); }
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c index 2619c96..1529850 100644 --- a/src/soc/intel/fsp_baytrail/romstage/romstage.c +++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c @@ -59,9 +59,6 @@ uint32_t chipset_prev_sleep_state(uint32_t clear) pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT); gen_pmcon1 = read32(PMC_BASE_ADDRESS + GEN_PMCON1);
- printk(BIOS_DEBUG, "PM1_STS = 0x%x PM1_CNT = 0x%x GEN_PMCON1 = 0x%x\n", - pm1_sts, pm1_cnt, gen_pmcon1); - if (pm1_sts & WAK_STS) { switch ((pm1_cnt & SLP_TYP) >> SLP_TYP_SHIFT) { #if CONFIG_HAVE_ACPI_RESUME @@ -159,6 +156,8 @@ void main(FSP_INFO_HEADER *fsp_info_header) uint32_t fd_mask = 0; uint32_t fd2_mask = 0;
+ /* Clear stack area for CBMEM */ + memset((void *)CONFIG_DCACHE_RAM_BASE,0,0x3000); post_code(0x40);
program_base_addresses(); @@ -215,7 +214,6 @@ void main(FSP_INFO_HEADER *fsp_info_header) * Memory is setup and the stack is set by the FSP. */ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) { - int cbmem_was_initted; void *cbmem_hob_ptr; uint32_t prev_sleep_state; struct romstage_handoff *handoff; @@ -258,7 +256,6 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) { post_code(0x4d); }
- cbmem_was_initted = !cbmem_recovery(prev_sleep_state == 3);
/* Save the HOB pointer in CBMEM to be used in ramstage*/ cbmem_hob_ptr = cbmem_add (CBMEM_ID_HOB_POINTER, sizeof(*hob_list_ptr));